作者: Jeyavijayan Rajendran , Ozgur Sinanoglu , Ramesh Karri
DOI: 10.1109/JPROC.2014.2332154
关键词:
摘要: Designers use third-party intellectual property (IP) cores and outsource various steps in their integrated circuit (IC) design flow, including fabrication. As a result, security vulnerabilities have been emerging, forcing IC designers end-users to reevaluate trust hardware. If an attacker gets hold of unprotected design, attacks such as reverse engineering, insertion malicious circuits, IP piracy are possible. In this paper, we shed light on the very large scale integration (VLSI) fabrication survey design-for-trust (DfTr) techniques that aim at regaining design. We elaborate four DfTr techniques: logic encryption, split manufacturing, camouflaging, Trojan activation. These developed by reusing VLSI test principles.