Protected encapsulation of catalytic layer for electroless copper interconnect

摘要: A method for utilizing electroless copper deposition to form interconnects on a semiconductor. Once via or trench is formed in dielectric layer, titanium nitride (TiN) tantalum (Ta) barrier layer deposited. Then, catalytic seed conformally blanket deposited vacuum over the layer. Next, without breaking vacuum, an aluminum protective onto encapsulate and protect from oxidizing. An technique then used auto-catalytically deposit The solution dissolves overlying expose surface of underlying occurs this surface, continues until via/trench filled. Subsequently, material are polished by application chemical-mechanical polishing (CMP) remove excess so that only remaining openings. Then silicon (SiN) above exposed order interconnect fully encapsulated adjacent TiN (or Ta) SiN