Self-aligned silicon-on-insulator nano flash memory device
作者： X. Tang , X. Baie , J.P. Colinge , A. Crahay , B. Katschmarsyj
DOI: 10.1016/S0038-1101(00)00221-5
关键词:
摘要: This paper reports on the fabrication of a silicon-on-insulator nano flash memory device based differential oxidation rate silicon resulting from gradients in arsenic doping concentration. The key processes involved are formation desired profile, electron beam lithography and wet oxidation. is triangular-channel MOSFET with nanocrystal floating gate embedded oxide. length, width height 10, 10 20 nm, respectively. As long as control voltage does not exceed +/-2V, behaves like thin narrow P-channel MOSFET. When -5 or +5 V applied to at room temperature, holes injected into removed it, effect induces persistent shift threshold device, which acts miniature EEPROM. (C) 2000 Elsevier Science Ltd. All rights reserved.
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