The DMOS consisting of channel region defined by LOCOS (LOCOS-DMOS): a new process/device technology for low on-resistance power MOSFET
作者： N. Tokura , S. Takahashi , K. Hara
DOI: 10.1109/ISPSD.1993.297124
关键词:
摘要: A novel process/device technology for a low on-resistance power MOSFET, namely, DMOS consisting of channel region defined by LOCOS (LOCOS-DMOS), is described. The vertical structure formed not the trench etching technique, but combination local oxidation silicon (LOCOS) and diffusion self-alignment (DSA) using oxide film as double mask. results modeling 12- mu m microcell two-dimensional numerical simulations indicate an approximately 40% improvement in compared with conventional planar-DMOS under same conditions cell pitch 50-V blocking voltage. formation hollow verified process simulation. LOCOS-DMOS promises great loss MOSFETs operated high-power switching. >
sci-hub.se 参考文章(8)
Hideo Sakai, Takeo Yoshimi, Katsuro Sugawara, Methods to Improve the Surface Planarity of Locally Oxidized Silicon Devices Journal of The Electrochemical Society. ,vol. 124, pp. 318- 320 ,(1977) , 10.1149/1.2133289
K. Shenai, Optimally scaled low-voltage vertical power MOSFETs for high-frequency power conversion IEEE Transactions on Electron Devices. ,vol. 37, pp. 1141- 1153 ,(1990) , 10.1109/16.52453
D. Ueda, H. Takagi, G. Kano, A new vertical power MOSFET structure with extremely reduced on-resistance IEEE Transactions on Electron Devices. ,vol. 32, pp. 2- 6 ,(1985) , 10.1109/T-ED.1985.21900
Stephen J. Fonash, An Overview of Dry Etching Damage and Contamination Effects Journal of The Electrochemical Society. ,vol. 137, pp. 3885- 3892 ,(1990) , 10.1149/1.2086322
Constantin Bulucea, Rebecca Rossen, Trench DMOS transistor technology for high-current (100 A range) switching Solid-State Electronics. ,vol. 34, pp. 493- 507 ,(1991) , 10.1016/0038-1101(91)90153-P
H.-R. Chang, R.D. Black, V.A.K. Temple, W. Tantraporn, B.J. Baliga, Self-aligned UMOSFET's with a specific on-resistance of 1 mΩ.cm 2 IEEE Transactions on Electron Devices. ,vol. 34, pp. 2329- 2334 ,(1987) , 10.1109/T-ED.1987.23240
K. Shenai, A 55-V, 0.2-m Omega -cm/sup 2/ vertical trench power MOSFET IEEE Electron Device Letters. ,vol. 12, pp. 108- 110 ,(1991) , 10.1109/55.75727
Professor B. Jayant Baliga, Impact of VLSI Technology on Power Devices The Japan Society of Applied Physics. ,(1990) , 10.7567/SSDM.1990.A-1-2