作者: Yuan-Te Hou , Wen-Ju Yang , Huang-Yu Chen , Lee-Chung Lu , Gwan Sin Chang
DOI:
关键词:
摘要: A method includes receiving an identification of a plurality circuit components to be included in IC layout. Data are generated representing first pattern connect two the components. The has segments. At least segments have lengthwise directions perpendicular each other. one pattern-free region is reserved adjacent at or more additional patterns near pattern. None formed region. and form double-patterning compliant set patterns. output machine readable storage medium read by system for controlling process fabricate pair masks patterning semiconductor substrate using double technology.