A study of relaxation current in high-/spl kappa/ dielectric stacks
作者： Z. Xu , L. Pantisano , A. Kerber , R. Degraeve , E. Cartier
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摘要: Dielectric relaxation currents in SiO/sub 2//Al/sub 2/O/sub 3/ and 2//HfO/sub 2/ high-/spl kappa/ dielectric stacks are studied this paper. We the thickness dependence, gate voltage polarity dependence temperature of current stacks. It is found that show different characteristics than what expected based on material polarization model. By drain variation measurement n-channel MOSFET, we confirm electron trapping detrapping cause current. From substrate injection experiments, it also concluded mainly due to traps located near 2//high-/spl interface. As induces a serious threshold shift problem, low trap density at interface key requirement for stack application reliability MOS devices.
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