Dispatching in semiconductor fabs with machine-dedication features
作者： Muh-Cherng Wu , Y. L. Huang , Y. C. Chang , K. F. Yang
DOI: 10.1007/S00170-004-2431-X
关键词:
摘要: This research develops dispatching algorithms for a fab with machine-dedication characteristics. Machine-dedication, new feature in modern fab, has not been addressed previous studies of dispatching. Three performance indices, including hit rate, mean cycle time, and throughput are concern an algorithm, called LB-SA, based on proposed simplification model the process route. The line balance (LB) component aims to smooth flow rate route; starvation avoidance (SA) ensure that bottleneck machine is “starving” enough work-in-progress (WIP) all time. Thirty algorithms, LB-SA compared by simulation. algorithm outperforms other 29 both terms only slightly less than best benchmark throughput. Of one CR-SA, also performs very well. These two recommended fabs feature.
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nctu.edu.tw参考文章(15)
Upendra Dave, Heuristic scheduling systems ,(1993)
C.Roger Glassey, Mauricio G.C. Resende, A scheduling rule for job release in semiconductor fabrication Operations Research Letters. ,vol. 7, pp. 213- 217 ,(1988) , 10.1016/0167-6377(88)90033-8
Young Hoon Lee, Jongkwan Park, Sooyoung Kim, Experimental study on input and bottleneck scheduling for a semiconductor fabrication line Iie Transactions. ,vol. 34, pp. 179- 190 ,(2002) , 10.1023/A:1011948031373
Marcel F. Neuts, A General Class of Bulk Queues with Poisson Input Annals of Mathematical Statistics. ,vol. 38, pp. 759- 770 ,(1967) , 10.1214/AOMS/1177698869
Kim Yeong-Dae, Lee Dong-Ho, Kim Jung-Ug, Roh Hwan-Kyun, A SIMULATION STUDY ON LOT RELEASE CONTROL, MASK SCHEDULING, AND BATCH SCHEDULING IN SEMICONDUCTOR WAFER FABRICATION FACILITIES Journal of Manufacturing Systems. ,vol. 17, pp. 107- 117 ,(1998) , 10.1016/S0278-6125(98)80024-1
L.M. Wein, Scheduling semiconductor wafer fabrication IEEE Transactions on Semiconductor Manufacturing. ,vol. 1, pp. 115- 130 ,(1988) , 10.1109/66.4384
R.M. Dabbas, J.W. Fowler, A new scheduling approach using combined dispatching criteria in wafer fabs IEEE Transactions on Semiconductor Manufacturing. ,vol. 16, pp. 501- 510 ,(2003) , 10.1109/TSM.2003.815201
Yeong-Dae Kim, Jung-Ug Kim, Seung-Kil Lim, Hong-Bae Jun, Due-date based scheduling and control policies in a multiproduct semiconductor wafer fabrication facility IEEE Transactions on Semiconductor Manufacturing. ,vol. 11, pp. 155- 164 ,(1998) , 10.1109/66.661295
S.X.C. Lou, P.W. Kager, A robust production control policy for VLSI wafer fabrication IEEE Transactions on Semiconductor Manufacturing. ,vol. 2, pp. 159- 164 ,(1989) , 10.1109/66.44620
Hyun Joong Yoon, Doo Yong Lee, A control method to reduce the standard deviation of flow time in wafer fabrication IEEE Transactions on Semiconductor Manufacturing. ,vol. 13, pp. 389- 392 ,(2000) , 10.1109/66.857950