作者: Yong Kim , Moo Sung Kim , Suk‐Ki Min , Choochon Lee
DOI: 10.1063/1.347272
关键词:
摘要: Capacitance‐voltage (C‐V) profiling of delta‐doped GaAs layers grown by metalorganic chemical vapor deposition on Si substrates has been employed to demonstrate a dislocation‐accelerated diffusion impurities initially confined in the sheets. A close correlation between dislocation densities epitaxial and coefficients obtained from C‐V analyses is established. After rapid thermal annealing at 800, 900, 950, 1000 °C for 7 s, temperature dependence coefficient found be D‐30 exp(−3.4 eV/kT) GaAs‐on‐Si with relatively thick buffer layer 3.3 μm. The result shows that considerable inclusion (−3 μm) not sufficient preventing into device‐active region near surface if high (>800 °C) processing involved.