Multi-port static random access memory equipped with a write control line
作者： Tatsuya Kunikiyo
DOI:
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摘要: Transistors (MN 9 , MN 10 ) are connected in series between a node (N 1 and write data bit line ( 41 ), have gates to control 44 word 31 respectively. A potential corresponding the exclusive OR of complement 42 is applied ). The which not used for operation precharged same turn off transistor memory device can reduce unwanted power consumption while rapidly performing inverts stored content.
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