作者: Zhuo Li , CN Sze , Charles J Alpert , Jiang Hu , Weiping Shi
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摘要: As technology scales to 0.13 micron and below, designs are requiring buffers be inserted on interconnects of even moderate length for both critical paths fixing electrical violations. Consequently, buffer insertion is needed tens thousands nets during physical synthesis optimization. Even the fast implementation van Ginneken's algorithm requires several hours perform this task. This work seeks speed up Ginneken style algorithms by an order magnitude while achieving similar results. To end, we present three approximation techniques in algorithm: (1) aggressive pre-buffer slack pruning, (2) squeeze (3) library lookup. Experimental results from industrial show that using these together yields solutions 9 25 times faster than algorithms, only sacrificing less 3% delay penalty.