作者: Y. Kanno , H. Mizuno , Y. Yasu , K. Hirose , Y. Shimazaki
DOI: 10.1109/ISSCC.2006.1696281
关键词:
摘要: Hierarchical power distribution using a tree is developed. It supports fine-grained gating with dozens of domains like clock and effectively reduces leakage currents for 1-million-gate to 1/4000 in multi-CPU processors minimal area overhead. This paper demonstrates the integration 20 90nm single-chip 3G cellular phone processor