作者: T. Hattori , T. lrita , M. Ito , E. Yamamoto , H. Kato
DOI: 10.1109/ISSCC.2006.1696282
关键词:
摘要: A power-management scheme for a single-chip multi-CPU processor uses 20 power domains. The enables the minimization of leakage currents in each operating mode: 299muA paging operation and 7muA stand-by. techniques controlling implementing domains are also described