Memory devices capable of reducing lateral movement of charges
作者： Kwang-Soo Seol
DOI:
关键词:
摘要: Memory devices are provided, the memory include a tunneling insulating layer disposed on substrate, charge storage layer, blocking and control gate electrode layer. The may have an edge portion spaced farther apart from than central of to concentrate density distribution cell.
lens.org 参考文章(13)
Kuo-Tung Sung, Ray C. Lee, Method and device for producing undercut gate for flash memory ,(1998)
Haruhiko Koyama, Daisuke Tsurumi, Mitsuhiro Noguchi, Semiconductor memory device including a stacked gate having a charge storage layer and a control gate, and method of manufacturing the same ,(2007)
Arup Bhattacharyya, Integrated two device non-volatile memory ,(2009)
Katsuhiko Tamura, Naoko Otani, Yukari Imai, Semiconductor memory device and manufacturing method of the same ,(1993)
Tsung-Lung Chen, Chih-Wei Hung, Hui-Hung Kuo, Cheng-Yuan Hsu, Non-volatile memory structure and method of fabricating non-volatile memory ,(2005)
I-Chun Chuang, Jui-Yu Pan, Cheng-Yuan Hsu, Flash memory and manufacturing method thereof ,(2006)
Hwa Sung Rhee, Ki Chul Kim, Sang Su Kim, Nae-in Lee, Geum-Jong Bae, Flash memory having local SONOS structure using notched gate and manufacturing method thereof ,(2003)
Yoshio Ozawa, Yoshitaka Tsunashima, MONOS type nonvolatile memory cell, nonvolatile memory, and manufacturing method thereof ,(2007)
Byung Seok Lee, Method for forming a gate electrode in a non volatile memory device ,(2004)