LDMOS structure with via grounded source
作者： Aram Mkhitarian
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摘要: A lateral conduction MOS structure characterized by reduced source resistance and pitch. The includes a semiconductor substrate having an epitaxial layer thereon, the being of same conductivity type. further drain layer, each second type, channel disposed between layer. has oxide gate thereon. At least one wet anisotropic reactive ion etching step is performed to define trench maximum width about from 4-6 microns depth that extends well into substrate. An electrically conductive via then formed deposition metal thereby establish low path ground.
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