Method for generating post-OPC layout in consideration of top loss of etch mask layer
作者： Geng Han , Sang Yil Chang , Wai-kin Li
DOI:
关键词:
摘要: A method of forming a semiconductor circuit includes receiving target layout. An optical proximity correction process is performed on the layout data to generate post-OPC patterning using The may be adjusted compensate for top loss an etch mask layer.
lens.org 参考文章(56)
Yan Borodovsky, Composite optical lithography method for patterning lines of unequal width ,(2004)
Wai-kin Li, O Seo Park, Methods of Manufacturing Semiconductor Devices and Optical Proximity Correction ,(2012)
Burn J. Lin, Jan-Wen You, Chung-Hsing Chang, Chang-Ming Dai, Full sized scattering bar alt-PSM technique for IC manufacturing in sub-resolution ERA ,(2004)
Youping Zhang, Method and apparatus for performing target-image-based optical proximity correction ,(2003)
Yuri Granik, Kyohei Sakajiri, Inverse mask design and correction for electronic design ,(2011)
John Mclntosh, Scott Nagel, Scott Jessen, Substrate topography compensation at mask design: 3D OPC topography anchored ,(2002)
Yao-Ting Wang, Frequency division multiplexing (FDM) lithography ,(2004)
Shih-Chiang Tu, San-De Tzu, Chia-Hui Lin, Interlayer method utilizing CAD for process-induced proximity effect correction ,(1997)
Kenji Yamazoe, Original data producing method and original data producing program ,(2007)
Sandra Bencic-Nagale, David R. Walt, Method and system of array imaging ,(2006)