作者: Janne Maunu , M Pankaala , Joona Marku , Jonne Poikonen , Mika Laiho
DOI: 10.1109/ISCAS.2006.1692644
关键词:
摘要: In this paper, we present an effective mismatch compensation method for analog current mode processing. Such a is required in and future mixed-mode processing systems, which take advantage of addition to conventional digital logic. The proposed design utilizes devices that can be scaled down with the manufacturing process, therefore employing advantages CMOS technology form smaller implementation area. range input currents employed 1 /spl mu/A 10 mu/A. example circuit calibrated within % nominal value at 4/spl sigma/ confidence interval 65 mu/m/sup 2/ area 0.15/spl mu/m technology.