Electrical test method and apparatus
作者： Christopher F. Bevis , Ian Robert Smith
DOI:
关键词:
摘要: An electrical test method and apparatus are disclosed. In the one or more ring oscillators formed in layers prior to formation of a metal 1 layer semiconductor wafer. The comprise formulation transistors local interconnects. One structures interconnect at after Each structure is coupled corresponding oscillators. A voltage applied non-precision contacts cause oscillate. At-speed performance determined from measured signals obtained structures. includes comprising interconnects wafer contact for applying
lens.org 参考文章(15)
Jeffrey Alan Kash, James Chen Hsiang Tsang, Apparatus and method for deriving temporal delays in integrated circuits ,(1998)
Yutaka Ito, Takeshi Hashimoto, Semiconductor memory device and refresh period controlling method ,(2005)
Scott Fairbanks, Method and apparatus for a distributed clock generator ,(2003)
Michael J. Hart, Xiao-Jie Yuan, Steven P. Young, Zicheng G. Ling, Characterizing circuit performance by separating device and interconnect impact on signal delay ,(2009)
Scott M. Fairbanks, Method and apparatus for generating and distributing a clock signal ,(2001)
Victor Agostinelli, Ben Eapen, Paul Newman, Glenn Shirley, On-die record-of-age circuit ,(2004)
Michael L Bushman, Lawrence E Connell, Multiphase voltage controlled oscillator ,(2002)
Nagaraj Narasimh Savithri, Method for modeling inductive effects on circuit performance ,(2004)
Nagaraj Narasimh Savithri, Method for capacitance measurement in silicon ,(2004)