A 19.2 GOPS mixed-signal filter with floating-gate adaptation

作者: M. Figueroa , S. Bridges , D. Hsu , C. Diorio

DOI: 10.1109/JSSC.2004.829933

关键词: Digital filterCMOSPulse (signal processing)Finite impulse responseTransistorElectronic engineeringFilter (video)Computer scienceMixed-signal integrated circuitAdaptive filterLeast mean squares filter

摘要: We have built a 48-tap, mixed-signal adaptive FIR filter with 8-bit digital input and an analog output 10 bits of resolution. The stores its tap weights in nonvolatile memory cells using synapse transistors, adapts the least mean square (LMS) algorithm. run through tapped delay line, multiply words multipliers, adapt coefficients pulse-based feedback. accuracy weight updates exceeds 13 bits. total die area is 2.6 mm/sup 2/ 0.35-/spl mu/m CMOS process. delivers performance 19.2 GOPS at 200 MHz, consumes 20 mW providing 6-mA differential current.

参考文章(22)
Chris Diorio, Paul Hasler, Bradley A. Minch, Carver Mead, A Complementary Pair of Four-Terminal Silicon Synapses Analog Integrated Circuits and Signal Processing. ,vol. 13, pp. 153- 166 ,(1997) , 10.1023/A:1008244314595
Eiji Takeda, Cary Y Yang, Cary Y-W Yang, Akemi Miura-Hamada, Hot-Carrier Effects in MOS Devices ,(1995)
J. Hyde, T. Humes, C. Diorio, M. Thomas, M. Figueroa, A floating-gate trimmed, 14-bit, 250 Ms/s digital-to-analog converter in standard 0.25 /spl mu/m CMOS symposium on vlsi circuits. pp. 328- 331 ,(2002) , 10.1109/VLSIC.2002.1015118
M. Lenzlinger, E. H. Snow, Fowler‐Nordheim Tunneling into Thermally Grown SiO2 Journal of Applied Physics. ,vol. 40, pp. 278- 283 ,(1969) , 10.1063/1.1657043
W. Figueroa, D. Hsu, C. Diorio, A mixed-signal approach to high-performance low-power linear filters IEEE Journal of Solid-state Circuits. ,vol. 36, pp. 816- 822 ,(2001) , 10.1109/4.918920
Carver Mead, Analog VLSI and Neural Systems ,(1989)
P. Hasler, J. Dugger, Correlation learning rule in floating-gate pFET synapses IEEE Transactions on Circuits and Systems Ii: Analog and Digital Signal Processing. ,vol. 48, pp. 65- 73 ,(2001) , 10.1109/82.913188
Chris Diorio, David Hsu, Aaron P. Shon, Learning Spike-Based Correlations and Conditional Probabilities in Silicon neural information processing systems. pp. 1123- 1130 ,(2001)
D. Senderowicz, S. Azuma, H. Matsui, K. Hara, S. Kawama, Y. Ohta, M. Miyamoto, K. Iizuka, A 23 mW 256-tap 8 MSample/s QPSK matched filter for DS-CDMA cellular telephony using recycling integrator correlators international solid-state circuits conference. pp. 354- 355 ,(2000) , 10.1109/ISSCC.2000.839813
D. Hsu, M. Figueroa, C. Diorio, Competitive learning with floating-gate circuits IEEE Transactions on Neural Networks. ,vol. 13, pp. 732- 744 ,(2002) , 10.1109/TNN.2002.1000139