Low-power high-speed InP MISFET direct-coupled FET logic

作者: L.J. Messick

DOI: 10.1109/T-ED.1984.21604

关键词: OptoelectronicsRing oscillatorMESFETElectrical engineeringMISFETPower–delay productVelocity saturationMaterials scienceInverterField-effect transistorLogic gateElectrical and Electronic EngineeringElectronic, Optical and Magnetic Materials

摘要: High-dynamic-range n-channel InP MISFET direct-coupled FET logic ring oscillator and inverter integrated circuits with minimum observed propagation delay per stage t_{pd} = 62 ps associated power product of 41 fJ Pt_{pd} 22 84 have been fabricated on Fe-doped semi-insulating substrate material using ion implantation for contact load channel regions pyrolytic SiO 2 as the gate insulator. Accumulation-type enhancement-mode structures source-drain separations 1.5 µm metallization lengths 3.0 were employed driver devices while both MESFET's 1.5-µm-length ungated "velocity saturation" used loads. With V_{DD} 4.5 V representative exhibited swings 3.58 V, noise margins 1.00 0.92 dc gain in linear region 2.2.

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