Logic and non-volatile memory (NVM) integration
作者： Mark D. Hall , Mehul D. Shroff
DOI:
关键词: Gate oxide 、 Layer (electronics) 、 Optoelectronics 、 Substrate (electronics) 、 Non-volatile memory 、 Electrical engineering 、 Materials science 、 Gate dielectric 、 Logic gate 、 Electrical conductor
摘要: A method includes forming a gate dielectric over substrate in an NVM region and logic region; first conductive layer the patterning to form select gate; charge storage second removing from after gate, control which overlaps sidewall of gate.
lens.org 参考文章(4)
Arup Bhattacharyya, Scalable integrated logic and non-volatile memory ,(2004)
Jong Jin Lee, Xuguang Wang, Weiping Bai, Nan Lu, Dim-Lee Kwong, Theoretical and experimental investigation of Si nanocrystal memory device with HfO/sub 2/ high-k tunneling dielectric IEEE Transactions on Electron Devices. ,vol. 50, pp. 2067- 2072 ,(2003) , 10.1109/TED.2003.816107
Z. Liu, C. Lee, V. Narayanan, G. Pei, E.C. Kan, Metal nanocrystal memories. I. Device design and fabrication IEEE Transactions on Electron Devices. ,vol. 49, pp. 1606- 1613 ,(2002) , 10.1109/TED.2002.802617
Chul-soon Kwon, Jae-Min Yu, In-Gu Yoon, Jung-Ho Moon, Young-cheon Jeong, Byeong-Cheol Lim, Methods of fabricating embedded flash memory devices ,(2006)