Method to form a polysilicon nanocrystal thin film storage bitcell within a high k metal gate platform technology using a gate last process to form transistor gates
作者： Sung-taeg Kang , Asanga H. Perera , Cheong Min Hong , Jane A. Yater
DOI:
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摘要: A process integration is disclosed for fabricating non-volatile memory (NVM) cells ( 105 - 109, 113 115 ) on a first flash cell substrate area 111 which are encapsulated in one or more planar dielectric layers 116 prior to forming an elevated 117 second CMOS transistor 112 high-k metal gate electrodes 119 120, 122 126, 132, 134 formed using gate-last HKMG flow without interfering with the operation reliability of NVM cells.
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