Gate Formation Memory by Planarization

作者: Chun Chen , Mark T. Ramsbey , Shenqing Fang , David Matsumoto

DOI:

关键词:

摘要: Semiconductor devices and methods of producing the are disclosed. The formed by forming a gate structure on substrate. includes charge trapping dielectric between substrate first poly layer. A top is over layer sidewall side second such that portion vertical in contact with dielectric. can then be removed through, for instance, planarization.

参考文章(51)
Chun Chen, Mark Ramsbey, Shenqing Fang, Sameer Haddad, Unsoon Kim, James Pak, Kuo Tung Chang, Memory First Process Flow and Device ,(2016)
Danny Pak-Chum Shum, Robert Strenz, Method for manufacturing a memory cell arrangement ,(2008)
Harry Hak-Lay Chuang, Chang-Ming Wu, Shih-Chang Liu, Wei-Cheng Wu, CMP fabrication solution for split gate memory embedded in HK-MG process ,(2013)
Kuo-Tung Chang, Lee Z. Wang, Craig Swift, Wei-Ming Chen, Method of making and accessing split gate memory device ,(1997)