作者: Cha-young Yoo , Seok-jun Won
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摘要: The semiconductor memory device includes an interlevel dielectric pattern and adhesive pattern, wherein both the patterns include a contact hole to expose substrate. sufficiently adheres lower electrode of capacitor thus prevents damage during formation capacitor. A conductive plug is disposed within may project higher than top surface pattern. leakage current preventive formed on layer from directly contacting prevent occurrences current. electrically connected plug.