Wafer-scale emitter package including thermal vias

作者: Marc Himel , Moshe Kriman , Giles Humpston

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摘要: Improved packages for light emitters may be fabricated at the wafer level. The package can a single device or an array of die. includes thermal via that extends through thickness substrate. made material possessing high conductivity. wider exterior than interior to provide heat spreading between and its sink. taper angle around 45 degrees match natural spread in solid. extend above interior, so height is sufficient position emitter placed thereon one foci parabola, where vertex parabola surface substrate from which extends.

参考文章(12)
Yasuhiro Sasaki, Tomohide Hasegawa, Koichi Motomura, Minako Izumi, Noriaki Hamada, Takuji Okamura, Wiring Board for Light-Emitting Element ,(2005)
Joseph B. Mazzochette, LED package with stepped aperture ,(2008)
Belgacem Haba, Giles Humpston, Moti Margalit, Semiconductor packaging process using through silicon vias ,(2008)
Robert L. Holman, Arthur Cox, High-density illumination system ,(2004)
Qing Gan, Frank S Geefay, Sloped via contacts ,(2004)
Akinori Shiraishi, Mitsutoshi Higashi, Yuichi Taguchi, Masahiro Sunohara, Naoyuki Koizumi, Kei Murayama, Semiconductor device package, semiconductor apparatus, and methods for manufacturing the same ,(2007)
Brian R. Stoner, Dorota Temple, William Devereux Palmer, Salvatore Bonafede, Through-via vertical interconnects, through-via heat sinks and associated fabrication methods ,(2002)