Reduce critical dimensions of vias and contacts through the device level of semiconductor devices
作者： Sven Mueller , Volker Jaschke , Tino Hertzsch , Kai Frohberg
DOI:
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摘要: A method comprising: Forming a device layer (110) comprises semiconductor (100), transistors (111) and formed above the etching stop (122) of silicon nitride; contact plane (120) via level by forming an interlayer dielectric material (121) over (110); mask (130) on basis etch (103) having plurality first openings (103A); second (130A) in wherein have width (130B) at least its underside, which is smaller than maximum (120A) (130A), so that portions are exposed; Etching exposed removing ...
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