作者: N. Hendrich
DOI: 10.1109/MNNFS.1996.493793
关键词:
摘要: This paper presents a digital architecture with on-chip learning for Hopfield attractor neural networks binary weights. A new rule the weights network is proposed that allows pattern storage up to capacity /spl alpha/=0.4 and incurs very low hardware overhead. Due use of couplings has minimal requirements. flexible communication structure cascading multiple chips in order build fully connected, block or feed-forward networks. System performance bandwidth scale linear number chips. prototype chip been fabricated functional. recognition application shows network.