作者: Richard A. Blanchard , Adrian I. Cogan
DOI:
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摘要: A dual-gate vertical field effect transistor comprises an N+ substrate (102) which serves as a drain, and N-epitaxial layer (104) formed on the substrate, (106) at surface of epitaxial source. plurality grooves (108a, 108b) extends through region portion N-layer. The are lined with insulating (110a, 110b) filled conductive polysilicon gate (112a, 112b). Underneath each is P+ (116a, 116b) second gate. Thus, in accordance present invention includes set gates for independently modulating current permitted to flow between source drain.