作者: Alessandro Scotti , Ezio Cislaghi , Renzo Pederzini
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摘要: A semiconductor memory is provided with means for refreshing the memory. Interrupt requests generated by initiate cycles, which take place in parallel normal read/write operations. The divided two parts or blocks. If central processor unit assigns a cycle operation to one of blocks, same utilized recharge refresh row storage elements integrated units constitute other block Refreshing regulated low priority interrupt and, if not responded to, high requests, are mandatory.