作者: W.P. Bai , N. Lu , J. Liu , A. Ramirez , D.L. Kwong
DOI: 10.1109/VLSIT.2003.1221115
关键词:
摘要: In this paper, we report for the first time Ge MOS characteristics with ultra thin rapid thermal CVD HfO/sub 2/ gate dielectrics and TaN electrode. Using newly developed pre-gate cleaning NH/sub 3/-based surface passivation, TaN/HfO/sub 2//Ge stack EOT of 12.9 /spl Aring/ exhibits excellent leakage current density 6 mA/cm/sup @Vg=1V interface state (D/sub it/) 8/spl times/10/sup 10//cm/sup 2/-eV. Both D/sub it/ CV hysteresis are improved significantly 3/ treatment. We also study effects post-deposition anneal investigate conduction mechanism stack.