作者: Hisaya Sakai , Michio Oryoji
DOI:
关键词: Maximum size 、 Trench 、 Copper interconnect 、 Etching rate 、 Electronic engineering 、 Materials science 、 Height difference 、 Semiconductor device 、 Composite material 、 Electrical conductor
摘要: A via hole is formed in the interlayer insulating film on a semiconductor substrate, reaching bottom of film. filling member fills lower partial space hole. wiring trench continuous with as viewed plan formed, partway thickness direction. The under condition that an etching rate faster than member, such manner height difference between upper surface and half or less maximum size shape removed. inside filled conductive member.