Memory architecture of 3D array with improved uniformity of bit line capacitances
作者： Hang-Ting Lue , Shih-Hung Chen , Chun-Hsiung Hung
DOI:
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摘要: A 3D integrated circuit memory array has a plurality of plane positions. Multiple bit line structures have multiple sequences Each sequence characterizes an order in which structure couples the positions to lines. is coupled at least two different access cells or more
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