Bridge for interfacing buses in computer system with a direct memory access controller having dynamically configurable direct memory access channels

作者: Lance M. Venarchick , Patrick M. Bland , Dennis Moeller , Daniel R. Cronin , Richard G. Hofmann

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摘要: A bridge interface for buses in a computer system has direct memory access (DMA) controller that controls transfers the system. The DMA pair of cascaded chips provide plurality channels. multiplexer circuit receives address signals from chips. are received both shifted form and an unshifted at inputs. By selection or multiplexer, either even odd addresses produced output each channel, thereby selectively providing 8-bit 16-bit accesses. control is programmable dynamic configuration DHA channels as

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