Method of making large-scale EPROM memory with a checker board pattern and an improved coupling factor
作者： Albert Bergemont
DOI:
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摘要: An electrically programmable non-volatile memory comprises word lines (LM2) extending along rows, and bit (LB1) columns. Each point (PM1) is constituted by a pair of MOS transistors (T22, T23) having floating gate (23). A conductive area (25) connected to the gates (23) two each in register with line made transistor pair. This corresponds, at position this pair, control (28).
lens.org 参考文章(10)
Hung Chang Lin, Metal nitride oxide semiconductor integrated circuit structure ,(1973)
Albert Bergemont, Non-volatile memory with floating grid and without thick oxide ,(1987)
Michel Heitzmann, Pierre Jeuch, Method of making an EPROM memory cell ,(1987)
Pierre Jeuch, Process for the production of a memory cell ,(1988)
Gabriella Ghidini, Giuseppe Crisenza, Fabrication process for eprom cells with oxide-nitride-oxide dielectric ,(1987)
Joseph Shappir, Process for fabricating a high density electrically programmable memory array ,(1979)
James L. Paterson, Allan T. Mitchell, Method for fabricating EPROM array ,(1986)
Daniel C. Guterman, E2 PROM having bulk storage ,(1982)
Izumi Tanaka, Masao Kanazawa, Method of fabricating double gate mos-type integrated circuit ,(1978)