作者: Rohit S Shenoy , Geoffrey W Burr , Kumar Virwani , Bryan Jackson , Alvaro Padilla
DOI: 10.1088/0268-1242/29/10/104005
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摘要: Several attractive applications call for the organization of memristive devices (or other resistive non-volatile memory (NVM)) into large, densely-packed crossbar arrays. While resistive-NVM frequently possess some degree inherent nonlinearity (typically 3?30? contrast), operation large ( 1000?1000 device) arrays at low power tends to require quite 1e7) ON-to-OFF ratios (between currents passed high and voltages). One path such nonlinearities is inclusion a distinct access device (AD) together with each state-bearing elements. an AD need not store data, its list requirements almost as challenging specifications demanded device. candidate ADs have been proposed, but obtaining performance without requiring single-crystal silicon and/or processing temperatures front-end-of-the-line?which would eliminate any opportunity 3D stacking?has difficult.We review our work IBM Research?Almaden on high-performance based Cu-containing mixed-ionic-electronic conduction (MIEC) materials [1?7]. These only back-end-of-the-line, making them highly suitable implementing multi-layer cross-bar MIEC-based offer ON/OFF (), significant voltage margin (over which current nA), ultra-low leakage 10 pA), while also offering densities needed phase-change fully bipolar RRAM. Scalability critical lateral dimensions 30 nm thicknesses 15 nm, tight distributions 100% yield in (512 kBit) arrays, long-term stability states, sub-50 ns turn-ON times all demonstrated. Numerical modeling these shows that their depends mediated hole conduction. Circuit simulations reveal scaled MIEC are 1.2 V) switching voltages, stacking two can support voltages up 2.5 V.