作者: Xiaoye Zhao , Yan Ye , Hong Du
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摘要: A method of fabricating an interconnect structure (e.g., dual damascene structure, and the like) integrated circuit device is disclosed. The fabricated using a bi-layer mask comprising imaging film organic planarizing film. used to remove lithographic misalignment between contact hole, trench, underlying conductive line when formed. Additionally, sacrificial layer may be protect inter-metal dielectric (IMD) during subsequent planarization structure. formed amorphous silicon (Si), titanium nitride (TiN), tungsten (W), like. metal copper (Cu), aluminum (Al), tantalum (Ti), or compound (TaN), (WN), like).