Optimizing IC performance using sequential timing
作者： Andrew Caldwell , Steven Teig
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摘要: A method of optimizing timing performance an IC design is provided. The expressed as a graph that includes several nodes represent components. identifies path in the starts from timed source node and ends at target node. has clocked elements computational elements. optimizes by skewing clock signals to set without changing position any element relative path. signal least one skewed more than period signal. implements using optimized design.
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