Stacked structure for parallel capacitors and method of fabrication

作者: Frank Yauchee Hui , Allen Yen , Yifeng Winston Yan

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摘要: A monolithic integrated circuit including a capacitor structure. In one embodiment the includes at least first and second levels of interconnect conductor for connection to semiconductor layer stack alternating conductive insulative layers formed in vertical alignment with respect an underlying plane. The is between conductor. Preferably layer, insulator over third commonly connected.

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Yukio Yamauchi, Katsuto Nagano, Michio Arai, Naoya Sakamoto, Method of manufacturing a hybrid integrated circuit component having a laminated body ,(1994)