Towards approximation during test of Integrated Circuits

摘要: In the recent years, Approximate Computing (AC) has emerged as a new paradigm for energy efficient design of Integrated Circuits (ICs). AC is based on intuitive observation that, while performing exact computation requires high amount resources, allowing selective approximation or an occasional relaxation specification can provide significant gains in efficiency. This work starts from consideration that AC-based systems intrinsically accept presence faulty hardware (i.e., produce errors). other words, system does not need to be built using defect-free ICs. Under this assumption, we relax test and reliability constraints manufactured One ways achieve goal only subset faults instead targeting all possible faults. way, reduce manufacturing cost since number patterns thus time. We call approach Test (AT). The main advantage fact do prior knowledge application. Therefore, proposed applied any kind IC, reducing time increasing yield. work, aim at validating AT by comparing it with functional approach. present preliminary results some simple case studies. show letting undetected save without having huge impact application quality.