Interconnect structures for integration of multi-layered integrated circuit devices and methods for forming the same
作者： John A. Smythe , Gurtej S. Sandhu , Nishant Sinha
DOI:
关键词: Interconnection 、 Semiconductor device 、 Algorithm 、 Integrated circuit 、 Electrical conductor 、 Transverse plane 、 Layer (electronics) 、 Optoelectronics 、 Materials science
摘要: Semiconductor devices comprise at least one integrated circuit layer, conductive trace and an insulative material adjacent a portion of the trace. At interconnect structure extends through material, comprising transverse cross-sectional dimension which differs from material. Methods forming semiconductor are also disclosed.
lens.org 参考文章(27)
Sang Hoo Dhong, Michael Jay Shapiro, Kevin John Nowka, Method for integrated circuit power and electrical connections via through-wafer interconnects ,(1999)
Osamu Nakao, Masahiro Okamoto, Shouji Ito, Reiji Higuchi, Multilayer wiring board, base for multilayer wiring board, printed wiring board, and its manufacturing method ,(2003)
Chih-Hua Chen, Chen-Cheng Kuo, Kai-Ming Ching, Chen Chen-Shien, Through-substrate via for semiconductor device ,(2007)
Tomoyuki Abe, Multilayer interconnection substrate and method of manufacturing the same ,(2006)
Mark Hiatt, Kyle K. Kirby, David R. Hembree, Warren M. Farnworth, James M. Wark, Sidney B. Rigg, Alan G. Wood, Charles M. Watkins, Steven D. Oliver, Lu Velicky, Mark E. Tuttle, Salman Akram, Through-wafer interconnects for photoimager and memory wafers ,(2010)
Yukiji Watanabe, Masaru Yamazaki, Kazuhiko Ooi, Takaaki Yazawa, Metal core substrate and process for manufacturing same ,(2003)
A. W. Topol, D. C. La Tulipe, L. Shi, D. J. Frank, K. Bernstein, S. E. Steen, A. Kumar, G. U. Singco, A. M. Young, K. W. Guarini, M. Ieong, Three-dimensional integrated circuits Ibm Journal of Research and Development. ,vol. 50, pp. 491- 506 ,(2006) , 10.1147/RD.504.0491
Jerzy Maria Zalesinski, Charles Gerard Woychik, Alan James Emerick, Michael Anthony Gaynes, Viswanadham Puligandla, High density integrated circuit packaging with chip stacking and via interconnections ,(1999)
Fu Chiung Chong, Sammy Mok, Massively parallel interface for electronic circuit ,(2006)
Kelly Hinckley, Timothy S. Campbell, Benu B. Patel, Gregory A. Head, Daniel P. Chesire, Selective isotropic etch for titanium-based materials ,(2003)