Method of making polysilicon self-aligned to field isolation oxide
作者： Bin-Shing Chen
DOI:
关键词: Reactive-ion etching 、 Oxide 、 Structural engineering 、 Trench 、 Materials science 、 Planar 、 Substrate (electronics) 、 Optoelectronics 、 Layer (electronics) 、 Wafer 、 Integrated circuit
摘要: A technique for forming an integrated circuit device having a self-aligned gate layer. The method includes variety of steps such as providing substrate, which is commonly silicon wafer. Field isolation regions including first region and second are defined in the semiconductor substrate. recessed between trench regions. made using reactive ion etching technique. thickness material polysilicon deposited overlying or on region, active region. step selectively removing portions performed, where forms substantially planar into step.
lens.org 参考文章(12)
Gheorghe Samachisa, Jack H. Yuan, Technique of forming over an irregular surface a polysilicon layer with a smooth surface ,(1994)
Louis Lu-Chen Hsu, Joseph Francis Shepard, Carol Galli, Joyce Elizabeth Acocella, Seiki Ogura, Nivo Rovedo, Packing density for flash memories ,(1996)
Tyler A. Lowrey, Trung Tri Doan, Method for fabricating a flash EEPROM ,(1995)
Di-Son Kuo, Jong Chen, Shui-Hung Chen, Chrong Jung Lin, Method for forming vertical channel flash memory cell and device manufactured thereby ,(1997)
Howard L. Tigelaar, Method of making planarized EPROM array ,(1989)
Hong-Chang Dai, Chang-Ming Dai, Shih-Chang Tai, Method for fabricating a sub-half micron MOSFET device with insulator filled shallow trenches planarized via use of negative photoresist and de-focus exposure ,(1996)
Ming-Tzong Yang, Method of fabricating electrically erasable read only memory cell ,(1991)
Raminda Madurawe, Dominik Schmidt, Method and apparatus for erasing an array of electrically erasable programmable read only memory cells ,(1994)
Robert H. Dennard, Dominic P. Spampinato, Field effect transistors and fabrication of integrated circuits containing the transistors ,(1976)
Robert H. Dennard, Vincent L. Rideout, Field effect transistors with polycrystalline silicon gate self-aligned to both conductive and non-conductive regions and fabrication of integrated circuits containing the transistors ,(1977)